Staff Hardware Security I/O Engineer

The Security I/O Hardware Design team leads innovation, development, and integration of advanced security features and I/O solutions across a diverse product portfolio.

The team operates within the Hardware Design Group, with two primary missions: to develop and integrate advanced I/O solutions by expertly managing complex IP projects, integrating both proprietary and third-party IPs, and pioneering new I/O technologies; and to implement robust security features across the SoC to ensure the integrity, confidentiality, and resilience of hardware systems.

Through these efforts, the team strives to deliver secure, high-performance hardware solutions that meet evolving technological demands and the latest industry standards.

The Role

• By joining this team, you will take ownership of designing, developing, and integrating advanced hardware IPs along with secure SoC features to deliver high-performance, reliable systems.
• Drive the design, development, and integration of advanced I/O solutions and complex IPs, including the integration of third-party IPs.
• Lead the implementation of security features across the SoC to ensure hardware integrity, confidentiality, and robustness.
• Lead the design of some hardware subsystems, including processing units, interconnects, memory, accelerators, and analog components.
• Contribute and participate in all aspects of IP development – including architecture definition, and integration to ensure high compatibility, performance, and security in complex SoC ecosystems.
• Collaborate closely across several teams, such as system, product, architecture, software, digital design and verification teams, to ensure cross-functional and design convergence.
• Evaluate and integrate hard and soft Security and I/O IPs.
• Develop and apply security models, threat analysis, and Trusted Computing Base concepts, such as Root of Trust and secure boot.
• Stay updated on emerging technologies, industry standards, and trends to continuously innovate I/O and security solutions.
• Manage complex dependencies across SoC project milestones, driving issue resolution with cross-team collaboration.
• Define and advance scalable methodologies, tools, and IP building blocks for efficient SoC development.
• Facilitate clear communication, knowledge sharing, and collaboration throughout the full product development lifecycle with a security focus.

Qualifications

• Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Engineering, or a related field.
• 10+ years of solid experience in IP/SoC architecture and design and implementation for ASIC or FPGA.

Skills and Knowledge

• In-depth understanding of the Processor Microcontroller Subsystem (PuC SS), including secure boot processes and power management techniques for chiplets (RISC-V core).
• Expertise in High-Speed I/O subsystems, managing interfaces such as UCIe and PCIe for high-bandwidth peripheral connectivity (Ethernet, PCIe, CXL, UCIe, LPDDR).
• Proficiency in Low-Speed I/O subsystem design and integration, managing slower peripheral interfaces (APB Peripherals, I2C, I3C, UART).
• Strong knowledge of Data Management principles, including data organization, buffering, and ensuring data integrity within SoC components (DMA).
• Experience with Network-on-Chip (NoC) architectures, enabling efficient communication within SoC components (AMBA, AXI, CHI).
• Comprehensive understanding of hardware Security Features, including implementation of cryptographic modules, isolation, attestation, and trusted computing bases (AES, RSA, PUF, Random number generation, and related security technologies).
• Capability to design and integrate Monitoring & Sensor systems to track chiplet health and operational status.
• Ability to collaborate across design, verification, firmware, and system teams to ensure robust subsystem integration and security.
• Knowledge of industry standards relevant to I/O and hardware security protocols.

• Join an innovative team and experience company growth.
• We believe in investing in our employees and providing them with the opportunities they need to grow and develop their careers.
• Enjoy a hybrid work environment.
• We also offer a flexible schedule.
• We offer remuneration that values your experience.

• The role is based in Barcelona (Spain).

We are looking for outstanding people willing to join our mission to change this industry and help build a better world.

If you feel identified with Openchip, please contact us. We can offer a competitive compensation package in a flexible work schema that will help you to keep a balance between your personal and professional life.

At Openchip & Software Technologies S.L., we believe a diverse and inclusive team is the key to groundbreaking ideas. We foster a work environment where everyone feels valued, respected, and empowered to reach their full potential – regardless of race, gender, ethnicity, sexual orientation, or gender identity.

The Security I/O Hardware Design team leads innovation, development, and integration of advanced security features and I/O solutions across a diverse product portfolio.

The team operates within the Hardware Design Group, with two primary missions: to develop and integrate advanced I/O solutions by expertly managing complex IP projects, integrating both proprietary and third-party IPs, and pioneering new I/O technologies; and to implement robust security features across the SoC to ensure the integrity, confidentiality, and resilience of hardware systems.

Through these efforts, the team strives to delivers secure, high-performance hardware solutions that meet evolving technological demands and to the latest industry standards.

The Role

• By joining this team, you will take ownership of designing, developing, and integrating advanced hardware IPs along with secure SoC features to deliver high-performance, reliable systems.
• Drive the design, development, and integration of advanced I/O solutions and complex IPs, including the integration of third-party IPs.
• Lead the implementation of security features across the SoC to ensure hardware integrity, confidentiality, and robustness.
• Lead the design of some hardware subsystems, including processing units, interconnects, memory, accelerators, and analog components.
• Contribute and participate in all aspects of IP development – including architecture definition, and integration to ensure high compatibility, performance, and security in complex SoC ecosystems.
• Collaborate closely across several teams, such as system, product, architecture, software, digital design and verification team, to ensure the cross-functional and design convergence.
• Evaluate and integrate hard and soft Security and I/O IPs.
• Develop and apply security models, threat analysis, and Trusted Computing Base concepts, such as Root of Trust and secure boot.
• Stay updated on emerging technologies, industry standards, and trends to continuously innovate I/O and security solutions.
• Manage complex dependencies across SoC project milestones, driving issue resolution with cross-team collaboration.
• Define and advance scalable methodologies, tools, and IP building blocks for efficient SoC development.
• Facilitate clear communication, knowledge sharing, and collaboration throughout the full product development lifecycle with a security focus.

Qualifications

• Bachelor’s, Master’s or PhD in Electrical Engineering, Computer Engineering or related field.
• 10+ years of solid experience in IP/SoC architecture and design and implementation for ASIC or FPGA.

Skills and Knowledge

• In-depth understanding of the Processor Microcontroller Subsystem (PuC SS), including secure boot processes and power management techniques for chiplets (RISC-V core).
• Expertise in High-Speed I/O subsystems, managing interfaces such as UCIe and PCIe for high-bandwidth peripheral connectivity (Ethernet, PCIe, CXL, UCIe, LPDDR).
• Proficiency in Low-Speed I/O subsystem design and integration, managing slower peripheral interfaces (APB Peripherals, I2C, I3C, UART).
• Strong knowledge of Data Management principles, including data organization, buffering, and ensuring data integrity within SoC component (DMA).
• Experience with Network-on-Chip (NoC) architectures, enabling efficient internal communication within SoC components (AMBA, AXI, CHI).
• Comprehensive understanding of hardware Security Features, including implementation of cryptographic modules, isolation, attestation, and trusted computing bases (AES, RSA, PUF, Random number generation, and related security technologies).
• Capability to design and integrate Monitoring & Sensor systems to track chiplet health and operational status.
• Ability to collaborate across design, verification, firmware, and system teams to ensure robust subsystem integration and security.
• Knowledge of industry standards relevant to I/O and hardware security protocols.

• Join an innovative team and experience company growth.
• We believe in investing in our employees and providing them with the opportunities they need to grow and develop their careers.
• Enjoy a hybrid work environment.
• We also offer flexible schedule.
• We offer a remuneration that values your experience.

• The role can is based in Barcelona (Spain).

We are looking for outstanding people willing to join our mission to change this industry and help to build a better world.

If you feel identified with Openchip, please contact us. We can offer a competitive compensation package in a flexible work schema that will help you to keep a balance between your personal and professional life.

At Openchip & Software Technologies S.L., we believe a diverse and inclusive team is the key to groundbreaking ideas. We foster a work environment where everyone feels valued, respected, and empowered to reach their full potential – regardless of race, gender, ethnicity, sexual orientation, or gender identity.